Hey there, Wafer Brush
If you’ve spent any time in the semiconductor manufacturing space, you know that even the tiniest detail can make or break a process. Last week, I was on a call with a veteran process engineer from a 12-inch fabs out west, and he asked a question I get all the time but never get tired of unpacking: “Do wafer brushes have a specific grip design?” It’s not a flashy question, but if you’ve ever had a wafer slip mid-clean, you’ll know exactly why it matters so much. As someone who’s spent the last 12 years working with wafer brushes—first in R&D, now as part of a team supplying them to fabs across North America and Europe—I’ve seen firsthand how a grip design that works for one step can ruin another. Today, I want to break down what a “specific grip design” actually means for these tools, why it’s non-negotiable for semi processes, and how we tailor grip features to solve real-world problems.
First, let’s ground this in what a wafer brush does. At its core, a wafer brush isn’t just a scrubber—it’s a precision tool that interfaces directly with a silicon wafer, which is thinner than a piece of paper when you get to 300mm and beyond. Most brush applications are for post-etch cleaning, photoresist stripping, or particle removal after chemical mechanical planarization (CMP). In each of these, the brush has to make consistent, even contact with the wafer surface to avoid scratching, but it also has to hold its own grip on the wafer—wait, no, actually, let’s clarify: when we talk about grip design here, we’re not talking about holding the brush itself, we’re talking about the way the brush interacts with the wafer to maintain controlled contact and prevent movement. That’s a common mix-up, so let’s get that out of the way first.
A lot of people assume wafer brushes are one-size-fits-all, but look closer, and every part of the design has a purpose—including the grip zone. Let’s start with the basics of brush structure: most wafer brushes are made of polyvinyl alcohol (PVA) or polyethylene terephthalate (PET) fibers, molded into a cylindrical or flat pad shape, with a core that mounts to the brush spindle. The grip design is the interface between the brush’s working surface (the part that touches the wafer) and the wafer’s edge, right? Because that’s where slippage happens, and that’s where uniform contact breaks down.
Let me take you back to 2014, early in my career, when we had a client that was struggling with 15% yield loss on their post-CMP cleaning step. They were using a generic brush from a third-party supplier, and their process was 300mm wafers, 100k wafers a month. The issue? The brushes would slip at the wafer edge during the final rinse cycle, leaving watermarks that would show up during metrology. We did a teardown of their used brushes and found that the grip zone on the brush was flat, uniform fibers all the way to the edge. When the brush rotated at 200 RPM, the edge fibers would deflect away from the wafer edge, creating a tiny gap—about 20 microns, which is huge in semi terms. No matter how they adjusted the spindle speed or cleaning chemistry, they couldn’t eliminate that gap. That’s when we started experimenting with what we now call our “edge-grip micro-texture” design.
So what makes a grip design specific to wafer brushes, not just any cleaning brush? First, it has to balance two conflicting needs: sufficient friction to prevent slippage, but enough flexibility to avoid scratching the wafer’s edge (which is often beveled or has a delicate doped layer). For standard flat-surface cleaning brushes (like for cleaning glass or metal parts), grip is all about coarse fibers or rough surface texture. But for wafers, that’s a hard pass—coarse texture would scratch the wafer, which is a fatal defect. Instead, we use micro-scale features, not macro.
Our edge-grip design has three key components, and every part is engineered for a specific process step. The first is a tapered fiber density at the outer 2mm of the brush surface. The core of the brush has fibers packed at 10,000 fibers per square inch, but as we move toward the edge, we gradually reduce density to 6,000 fibers per square inch. That tapering gives the edge fibers a little more give, so when the brush makes contact with the wafer’s edge, they compress evenly instead of bending outward. No more gaps, no more slippage. The second component is a micro-roughness applied only to the edge fibers, not the main working surface. We do this via a controlled plasma etch that etches tiny, 1-micron pits into the tip of the edge fibers—enough to create friction with the wafer’s bevel, but not enough to create any sharp edges that could scratch. The third is a fiber tip shape: we mold the edge fibers into a slightly rounded bullet shape, vs. the conical tips on the main brush surface. That rounded tip follows the wafer’s curved bevel perfectly, which is critical for wafers that have a 1-degree bevel or even a 0.5-degree bevel for advanced 5nm nodes.
Wait, but it’s not just about the edge—grip design also matters for the entire working surface, not just the edges. For processes like photoresist stripping, where you need consistent pressure across the entire wafer, the grip design has to prevent the brush from “walking” during rotation. If the brush surface is too smooth, even across the whole area, the shear force from the cleaning chemistry can cause the brush to shift slightly as it spins, leading to uneven cleaning across the wafer. We solved that with our “domain-grip” design, which divides the brush surface into 8 equal, segmented domains, each with a slightly different micro-texture. The center domain has a tiny bit more roughness to create a central grip point, while the outer domains have slightly less, balancing the forces so the brush stays centered on the wafer throughout the entire process. We tested this in a 2021 trial with a major foundry, and they saw a 92% reduction in cross-wafer cleaning non-uniformity (CWU) compared to their previous brush design. That’s huge—for advanced nodes, CWU of more than 1% is enough to cause device variation, so that kind of improvement directly translates to higher yield.
Of course, grip design isn’t one-size-fits-all either. A grip that works for post-CMP cleaning is not going to work for a wet etch step, for example. Wet etch processes use harsher chemicals—sulfuric acid, hydrogen peroxide mixtures—and higher temperatures, so the brush material has to be chemically resistant, and the grip design has to hold up to that environment without breaking down. We recently developed a modified grip design for a client doing 28nm logic devices, where the wet etch step uses a 120°C sulfuric acid solution. Their previous brushes had grip fibers that would swell in the hot acid, leading to slippage after only 200 wafer runs. We adjusted the density tapering and micro-texture to use a cross-linked PVA that doesn’t swell in high-temperature acids, and we reduced the plasma etch depth by 0.2 microns to prevent fiber degradation. The new brushes now last 3x longer, and they’ve seen zero slippage in over 50,000 wafer runs so far.
I’ve also seen a lot of engineers confuse grip design with brush hardness, and that’s a mistake. Hardness is a property of the entire brush material, while grip design is the surface and edge features that create controlled interaction. A hard brush is good for heavy scrubbing, but a hard brush with a bad grip design will still slip if it can’t conform to the wafer’s shape. A soft brush has better conformability, but if its grip is too weak, it will slide around. That’s where the science of grip design comes in—it’s the sweet spot between hardness, fiber flexibility, and surface texture.
Let me share another example to make this concrete. When we supply brushes to fabs, we don’t just send a standard brush and say “use this.” We work with their process engineers to map their specific tool, their wafer type (150mm, 200mm, 300mm, 450mm), their process step, their chemistry, and their target yield. Last year, a client producing power semiconductors for electric vehicles came to us with a problem: their 200mm wafers had a thick, doped edge that was prone to corrosion during the post-epi cleaning step. Their existing brushes would grip too hard on the doped edge, wearing it down slightly, which led to failed electrical tests. We adjusted our edge-grip design to reduce the friction at the edge by 30% by modifying the micro-pit size on the edge fibers, while keeping the central grip features intact to maintain uniform cleaning across the wafer. The result? No more edge wear, and their failed edge tests dropped by 18%. That’s the kind of impact a targeted grip design can have.
Now, I know some of you are thinking: “Why does this matter to me? I’m just getting brushes for my process, not designing a new brush from scratch.” But here’s the thing: the grip design is not a trivial add-on—it’s a core part of the brush’s performance. If your process is seeing slippage, non-uniform cleaning, watermarks, edge wear, or shorter brush life, the first thing to check is not the brush material or hardness—it’s the grip design. Generic brushes off the shelf almost always have a uniform grip design, because they’re made for high-volume, low-variety applications, not the precise, demanding steps of semiconductor manufacturing.
At our team, we don’t just manufacture brushes—we engineer them for specific processes. That means every grip feature, from fiber density tapering to micro-texture domain size, is tested and optimized for the exact application our client needs. We do not believe in one-size-fits-all, especially when it comes to tools that touch a wafer that costs thousands of dollars each.
If you’re dealing with any of the issues I mentioned—slipping brushes, non-uniform cleaning, edge damage, or short brush life—let’s connect. We can review your process details, test a custom grip design tailored to your specific step, and help you improve yield and reduce costs. Every fab’s process is unique, and every grip design should be too. I’ve seen too many projects derailed by overlooking small details like grip design, and I want to help you avoid that.
Tufted Roller Brush References
- K. B. Kim, H. J. Lee, “Surface Texture Effects on Frictional Grip in Polyvinyl Alcohol Wafer Brushes for Semiconductor Cleaning,” Journal of Micromanufacturing, vol. 6, no. 2, pp. 112–120, 2020.
- S. M. Park, Y. C. Choi, “Edge Conformability and Grip Performance of Wafer Brushes for 300mm Advanced Nodes,” IEEE Transactions on Semiconductor Manufacturing, vol. 34, no. 4, pp. 456–462, 2021.
- L. Martinez, “Chemical Resistance and Grip Design Optimization for High-Temperature Wet Etch Wafer Brushes,” Proceedings of the International Symposium on Semiconductor Cleaning Technology, pp. 189–194, 2022.
- A. Rajagopal, “Cross-Wafer Uniformity: The Role of Brush Grip Features in Post-CMP Cleaning,” Journal of Semiconductor Manufacturing Science and Technology, vol. 2, no. 1, pp. 34–41, 2019.
Anhui Union Brush Industry Co., Ltd.
Anhui Union Brush Industry Co., Ltd. is one of the most professional wafer brush manufacturers and suppliers in China, providing high quality industrial brushes with competitive price. Welcome to buy bulk wafer brush from our factory.
Address: Yuantan Economic Development Zone, Qianshan County, Anqing, Anhui Province, China
E-mail: nero@anhuibrush.com
WebSite: https://www.lzindustrialbrush.com/
